Libav
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00001 /* 00002 * mmx.h 00003 * Copyright (C) 1997-2001 H. Dietz and R. Fisher 00004 * 00005 * This file is part of FFmpeg. 00006 * 00007 * FFmpeg is free software; you can redistribute it and/or 00008 * modify it under the terms of the GNU Lesser General Public 00009 * License as published by the Free Software Foundation; either 00010 * version 2.1 of the License, or (at your option) any later version. 00011 * 00012 * FFmpeg is distributed in the hope that it will be useful, 00013 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00014 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 00015 * Lesser General Public License for more details. 00016 * 00017 * You should have received a copy of the GNU Lesser General Public 00018 * License along with FFmpeg; if not, write to the Free Software 00019 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 00020 */ 00021 #ifndef AVCODEC_X86_MMX_H 00022 #define AVCODEC_X86_MMX_H 00023 00024 #warning Everything in this header is deprecated, use plain __asm__()! New code using this header will be rejected. 00025 00026 00027 #define mmx_i2r(op,imm,reg) \ 00028 __asm__ volatile (#op " %0, %%" #reg \ 00029 : /* nothing */ \ 00030 : "i" (imm) ) 00031 00032 #define mmx_m2r(op,mem,reg) \ 00033 __asm__ volatile (#op " %0, %%" #reg \ 00034 : /* nothing */ \ 00035 : "m" (mem)) 00036 00037 #define mmx_r2m(op,reg,mem) \ 00038 __asm__ volatile (#op " %%" #reg ", %0" \ 00039 : "=m" (mem) \ 00040 : /* nothing */ ) 00041 00042 #define mmx_r2r(op,regs,regd) \ 00043 __asm__ volatile (#op " %" #regs ", %" #regd) 00044 00045 00046 #define emms() __asm__ volatile ("emms") 00047 00048 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg) 00049 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var) 00050 #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd) 00051 00052 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg) 00053 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var) 00054 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd) 00055 00056 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg) 00057 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd) 00058 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg) 00059 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd) 00060 00061 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg) 00062 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd) 00063 00064 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg) 00065 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd) 00066 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg) 00067 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd) 00068 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg) 00069 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd) 00070 00071 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg) 00072 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd) 00073 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg) 00074 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd) 00075 00076 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg) 00077 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd) 00078 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg) 00079 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd) 00080 00081 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg) 00082 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd) 00083 00084 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg) 00085 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd) 00086 00087 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg) 00088 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd) 00089 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg) 00090 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd) 00091 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg) 00092 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd) 00093 00094 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg) 00095 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd) 00096 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg) 00097 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd) 00098 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg) 00099 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd) 00100 00101 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg) 00102 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd) 00103 00104 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg) 00105 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd) 00106 00107 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg) 00108 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd) 00109 00110 #define por_m2r(var,reg) mmx_m2r (por, var, reg) 00111 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd) 00112 00113 #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg) 00114 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg) 00115 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd) 00116 #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg) 00117 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg) 00118 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd) 00119 #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg) 00120 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg) 00121 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd) 00122 00123 #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg) 00124 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg) 00125 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd) 00126 #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg) 00127 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg) 00128 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd) 00129 00130 #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg) 00131 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg) 00132 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd) 00133 #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg) 00134 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg) 00135 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd) 00136 #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg) 00137 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg) 00138 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd) 00139 00140 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg) 00141 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd) 00142 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg) 00143 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd) 00144 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg) 00145 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd) 00146 00147 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg) 00148 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd) 00149 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg) 00150 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd) 00151 00152 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg) 00153 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd) 00154 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg) 00155 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd) 00156 00157 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg) 00158 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd) 00159 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg) 00160 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd) 00161 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg) 00162 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd) 00163 00164 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg) 00165 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd) 00166 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg) 00167 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd) 00168 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg) 00169 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd) 00170 00171 #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg) 00172 #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd) 00173 00174 00175 /* 3DNOW extensions */ 00176 00177 #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg) 00178 #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd) 00179 00180 00181 /* AMD MMX extensions - also available in intel SSE */ 00182 00183 00184 #define mmx_m2ri(op,mem,reg,imm) \ 00185 __asm__ volatile (#op " %1, %0, %%" #reg \ 00186 : /* nothing */ \ 00187 : "m" (mem), "i" (imm)) 00188 #define mmx_r2ri(op,regs,regd,imm) \ 00189 __asm__ volatile (#op " %0, %%" #regs ", %%" #regd \ 00190 : /* nothing */ \ 00191 : "i" (imm) ) 00192 00193 #define mmx_fetch(mem,hint) \ 00194 __asm__ volatile ("prefetch" #hint " %0" \ 00195 : /* nothing */ \ 00196 : "m" (mem)) 00197 00198 00199 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg) 00200 00201 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var) 00202 00203 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg) 00204 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd) 00205 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg) 00206 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd) 00207 00208 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm) 00209 00210 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm) 00211 00212 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg) 00213 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd) 00214 00215 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg) 00216 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd) 00217 00218 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg) 00219 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd) 00220 00221 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg) 00222 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd) 00223 00224 #define pmovmskb(mmreg,reg) \ 00225 __asm__ volatile ("movmskps %" #mmreg ", %" #reg) 00226 00227 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg) 00228 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd) 00229 00230 #define prefetcht0(mem) mmx_fetch (mem, t0) 00231 #define prefetcht1(mem) mmx_fetch (mem, t1) 00232 #define prefetcht2(mem) mmx_fetch (mem, t2) 00233 #define prefetchnta(mem) mmx_fetch (mem, nta) 00234 00235 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg) 00236 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd) 00237 00238 #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm) 00239 #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm) 00240 00241 #define sfence() __asm__ volatile ("sfence\n\t") 00242 00243 /* SSE2 */ 00244 #define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm) 00245 #define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm) 00246 #define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm) 00247 #define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm) 00248 00249 #define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm) 00250 00251 #define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg) 00252 #define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var) 00253 #define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd) 00254 #define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg) 00255 #define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var) 00256 #define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd) 00257 00258 #define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var) 00259 00260 #define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg) 00261 #define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg) 00262 00263 #define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd) 00264 #define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd) 00265 00266 00267 #endif /* AVCODEC_X86_MMX_H */